Design guidelines for 100 gbps cfp2 interface eeweb community. The project was aimed at defining a 4 lane electrical interface for use with next generation 100g optical modules one of the underlying goals of the project, was that the work could. The objectives and requirements for the cei28gvsr implementation agreement are given by the project definition as follows. Cei 28g mr defines requirements for a chiptochip mediumreach highspeed electrical interface between nominal baud rates of 19. Cei high fidelity spare parts production and innovation. Contact information for cei28g srlr ip core suppliers. See cei28gvsr equation 19 db common mode to differential conversion and differential to common mode conversion sdc11, scd11 tp1 see cei28gvsr equation 20 db stressed input test tp1a see cei28gvsr section. To determine the overall design margin, a cei 28g vsr 100 gigabit ethernet design required the analysis of 5 million combinations of channel variation, transceiver process and equalization settings. The module optical connection is duplex lc and shall be. Product features hotpluggable cfp4 form factor supports 103. Apr 09, 2015 oif 2015 foe architecture presentation. See cei 28gvsr equation 19 db common mode to differential conversion and differential to common mode conversion sdc22, scd22 tp4 see cei 28gvsr equation 21 db common mode return loss scc22 tp4 2 db 2 transition time, 20 to 80% tp4 9. Likewise, cei 28g vsr specifies a 28gbps data rate for very shortreach chiptomodule and chipto.
Short reach interfaces use multiplefiber pushonpulloff mpo optical connectors. Install base application download the latest version of the qualiphy software from. System oem design guidelines for chip to module interfaces. Cei 25glr is intended for 25 gbps data transmission across longreach backplane architectures. Oif cei is also working on 25 28g sr and vsr short and very short reach specifications. Optimal implementation of 25g28g retimers versus redrivers. Electrical interface 28gvsr cei28gvsr this clause details the requirements for the cei28gvsr very short reach high speed chipmodule electrical io of nominal baud rates of 19.
A compliant device must meet all of the requirements listed below. The cei28gvsr ia is intended to be used for very short reach channels, with length up to 150 mm, and loss up to 10. Vsr is likely to be used on 100g modules configured with 4x25gbps interfaces. Oif cei28gvsr activities the oif kicked of the cei28gvsr project in jan10.
Cei28gvsr interface and two demonstrations addressed the 19. Figure c shows a scope screen capture of the data eye at the output of the transmit cdr after having equalized. The common electrical io cei refers to a series of influential interoperability agreements. Builtin clock recovery 4channel simultaneous testing in a. Preliminary product specification 10km multirate 100g cfp4 optical transceiver module. It is optimized for 100gbps ethernet, oif cei28gvsr and otu4 optical transport applications. Fremont, ca the oif announced today the publication of the common electrical io cei 4. Complete datasheets for cei28g srlr ip core products. General description this 10 nm dfb 25gbs sfp28 lr transceiver is designed to transmit and receive optical data over single mode optical fiber for link length up to 10km. It is optimized for 50gbps ethernet, oif cei56gvsr applications with low power consumption of sub250mw per channel 56gbps. The electrical io is based on high speed, low voltage logic.
Cfp4 100gbaselr4 interoperabiity using cei28gvsr a mosys evaluation board with mosys linespeed 100g low power full duplex retimer driving cei28gvsr to a host breakout card with a yamaichi cfp4 host. Receiver sensitivity dbm power budget db cfp4100glr4 sm 1296 9 nm 4. Oif 2015 foe architecture presentation linkedin slideshare. Ciscos cpak optical module uses the four lane cei 28g vsr electrical interface. The transceiver complies with cfp msa cfp2 hardware specification rev. Qualiphy is a windowsbased application that can be configured with one or more serial data compliance components. How design of experiments saved my cei vsr 28g design.
The objectives and requirements for the cei 28g vsr implementation agreement are given by the project definition as follows. Cei25glr is intended for 25 gbps data transmission across longreach backplane architectures. Oif cei is also working on 2528g sr and vsr short and very short reach specifications. Ce28gvsrcaui4 electrical interfaces based on lowpower ctle receivers o cei56gvsrpam450gaui also based on ctle approach channel selection enabling a broad suite of applications o nominal 10db channel was the right choice selection of a modulation scheme which. Oif completes three implementation agreements for 100g electrical. Cei11g 56gs adc digital calibration time interleaved adc 30ghz fujitsu batboard vlsi datasheet for dac and adc megtron otu 4 4020rphrp text. Cei 112g vsr stressed input test support the true dut lowerrorrate rx performance can be tested using the worstcase signal with added stress. Cei 28g vsr is the definitive module interconnection for the 28g generation and has been implemented by several optical module products. A type of dietodie integration via a silicon interposer having throughsilicon vias tsvs connecting its top and bottom metal.
Optical internetworking forum common electrical interface 28g vsr cei 28g vsr this clause details the requirements for the cei 28g vsr very short reach high speed chipmodule electrical io of nominal baud rates of 19. Using samtecs edge rate contact system, this series is designed for applications requiring highmating cycles and 28gbps performance. Ability to enable simple, lowpower optical module implementations o e. It describes nrz and pam4 fundamentals, standards using pam4 coding schemes, and cei56g interconnect reaches and application distances. To determine the overall design margin, a cei 28g vsr100 gigabit ethernet design required the analysis of 5 million combinations of channel variation, transceiver process and equalization settings. The oif cei 28g vsr sr plugin must be installed separately on top of the m8070a system software. Many benefits are associated with having half the nyquist frequency. Cei28gmr defines requirements for a chiptochip mediumreach highspeed electrical interface between nominal baud rates of.
Agilents advanced design system tx and rx modules that are configured to the cei 28 vsr working clause proposal, cei implementation agreement draft 7. The hxc44200 is a bidirectional dual channel pam4 cdr retimer for retiming data rates from 51gss to 56gss. Finisar ftlc1141sdnl 100gbaselr4 and otn multirate 10km. Cfp2 also defines the mechanical form factor for a 100 gbps optical transceiver module targeted for. Oifs cei25glr defines the waveforms voltages, eye openings, etc. Cei 28g vsr interoperability block diagram and setup. Hsec814001lpv41 high speed vertical edge card power. The finisar cfp4 er4f module drove cei28gvsr to the xilinx fpga that checked the prbs31 data pattern. Avsp1104 datasheetpdf 1 page avago technologies limited. Cei 28g vsr channel distance and loss budget requirements marco mazzini, gary nicholl, cisco oif technical meeting, hong kong, may 11, 2010. Eye width ew15 at 1015 probability is equal to ew63. This clause details the requirements for the cei28gvsr very short reach high speed chiptomodule electrical interface of nominal baud rates of. Cei28gvsr specifies a chiptomodule electrical interface for the.
It performs calibrations and tests for 28gvsr and 28gsr host compliance. Transceiver link design guidelines for highgbps data. Oif is where the optical networking industrys interoperability work gets done. With more than 100 member companies spanning component suppliers to network operators, oif.
Enable oif cei28gvsr retimed interfaces by compensating for losses in the data transmission and resetting the jitter budget optimized for best jitter performance designed specifically for the nextgeneration 100gbe cfp2 module formfactor allow for the serializer and deserializer to be positioned. System architectures using oif cei56g interfaces nathan tracy technologist, te connectivity technical committee chair, oif. Send your curriculum by work with us area italian language. Likewise, cei 28g vsr specifies a 28gbps data rate for very shortreach chiptomodule and chipto chip applications. Feb 15, 2017 ability to enable simple, lowpower optical module implementations o e. Oifcei 28g vsrsr compliance test is a plugin for m8070a. Gn2426 are lowpower retimers optimized for referencefree 25 28gbps. The mdio management interface complies with ieee 802. Product specification 100m multirate parallel mmf 100g qsfp28. Ce 28g vsr caui4 electrical interfaces based on lowpower ctle receivers o cei 56g vsr pam450gaui also based on ctle approach channel selection enabling a broad suite of applications o nominal 10db channel was the right choice selection of a modulation scheme which.
Oifcei 28g vsrsr compliance test plugin for m8070a keysight. Agilents advanced design system tx and rx modules that are configured to the cei28vsr working clause proposal, cei implementation agreement draft 7. Oif 112g panel at designcon 2017 linkedin slideshare. This is the first completion of serdes standards for the cei generation of 56 gbps io devices and adds pam4 and ensemble nrz as additional advanced modulation schemes to nrz. Keysight oif cei 28g vsr sr user guide 9 introduction 1 description of terms used in oif cei cei 28g short reach sr interface the cei 28g sr is a high speed electrical interface with low voltage logic. These technologies offer significantly higher speeds than 10 gigabit ethernet. First demonstration of chiptomodule electrical channel. Oifs cei 25glr defines the waveforms voltages, eye openings, etc. Preliminary product specification 10km multirate 100g cfp4 optical transceiver module ftlc1141sdnl. Cfp2 is a pluggable optical module that uses cei 28g vsr as its electrical interface as defined by the cfp multisource agreement msamember companies. Electrical interface 28g vsr cei 28g vsr this clause details the requirements for the cei 28g vsr very short reach high speed chipmodule electrical io of nominal baud rates of 19. Cfp2, cpak and qsfp28 with cei28gvsr and cei25glr interface during ecoc 20 exhibition.
It is optimized for 100gbps ethernet, oif cei 28g vsr and otu4 optical transport applications. Coherent solutions epiqbert spec sheet specs as at february 2019. Cei28gvsr channel distance and loss budget requirements. Based on established methodologies including the documentation of industry requirements, bringing forward memberdriven technical solutions, validation testing and free publishing, oifs interoperability solutions are vital to the global network. Support serial baud rates f b within the range from 19. The hxc42400 is a unidirectional quad channel cdr retimer for retiming data rates from 25gbps to 28.
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